Memory devices realized on a semiconductor chip are often packaged using a leadframe, which is connected to a board via interconnections. The semiconductor chip may have contacting pads along the periphery or along a center row. The contacting pads electrically connect the chip to the leadframe either through wire-bonds or conductive bumps, or conductive paste or other means. The chip is mechanically connected to the leadframe with a tape or adhesive interposed in a way similar to flip-chip components. The leadframe may have a central bonding channel if the chip has center row contacting pads. The back side of the chip may be protected with a molding compound. Wire bridges are drawn through a bonding channel to a wiring on the side of the leadframe opposite to the chip. The wiring bridges thus electrically connect the contacting pads on the chip to the wiring. This wiring on the leadframe has contact pads also, on which interconnection elements, like solder balls, are arranged. The assembly can then be attached or soldered onto a printed circuit board (PCB). An example of such an arrangement is disclosed by German Patent Application DE 102 61 410 A1, which is incorporated herein by reference.
Classic connection technologies, such as wire bonding, are disadvantageous here because they will no longer support memory devices with high frequencies and high electrical performance. Further difficulties are caused by the coefficient of thermal expansion (“CTE”) mismatch between the different materials used in the package.
In order to reduce parasitic inductances, capacitances or the electrical resistance associated with these connection technologies, flip-chip packages that have electrochemically deposited redistribution layers and flip-chip interconnect elements may be used. Flip-chip packages of this type are disclosed, for example, by U.S. Patent Publication No. 2004/0124540 A1 and European Patent No. 1 369 919 A1, both of which are incorporated herein by reference. In both cases, the chips are provided with a multiplicity of solder bumps, which are soldered to contact pads on a board.
However, because of the CTE mismatch between the board and the chip, fixed interconnections used on these flip-chip packages are not reliable under exposure to changing temperatures without additional process steps such as underfilling/undermolding. Underfilling/undermolding is the introduction of a plastic molding compound between the chip and the board as shown by U.S. Patent Publication Nos. 2004/0082107 A1 and 2003/0218261 A1, both of which are incorporated herein by reference. The plastic molding compound firmly adheres both to the chip and to the board. As a result, there is mechanical coupling between the chip and the board, which converts otherwise occurring shearing forces into bending forces.
This largely compensates for the CTE mismatch, but involves additional processing steps and consequent complexity. Further, problems arise during storage in moist conditions, because the plastic materials absorb moisture, leading to reduced reliability. In addition, this process is expensive and does not work in the case of printed circuit boards that are populated with components on both sides.
Instead of fixed interconnections, flexible interconnect elements may also be used, allowing compensation for the CTE mismatches that occur under exposure to changing temperatures. Examples of flexible interconnect structures are disclosed by German Patent Nos. DE 102 58 081 A1, DE 102 58 093 B3 and DE 102 41 589 A1, each of which is incorporated herein by reference. However, the mechanical load-bearing capacity of packages with such flexible interconnections is very low, so that additional measures are necessary for mechanical stabilization. However, such measures are complex and expensive, and counterproductive with respect to reliability.
Finally, German Patent No. DE 101 45 382 A1, which is incorporated herein by reference, describes a method for producing a semiconductor component in which the component is surrounded by a chip frame. Chips are singulated from a wafer, and arranged in a grid on a holding frame, the chips being spaced from one another in the grid. The chips may be attached to the holding frame by adhesive bonding. The space between the chips is filled with a polymer molding compound so as to encircle the chips on all sides, thus forming the chip frame. Component-specific redistribution layers and contact elements are then produced on this chip frame. Subsequently, the components are separated from one another by sawing the holding frame, and the individual components can then be mounted on a board.